Below is a list of SLE employee authored and published papers or articles.
"Interlaken Technology: New-Generation Packet Interconnect Protocol"
Serial link technology has multiplied device interconnect bandwidths in advanced communication equipment. Interlaken is an interconnect protocol optimized for high-bandwidth and reliable packet transfers. It uses bundles of serial links to create a logical connection between components with multiple channels, backpressure capability, and data-integrity protection to boost the performance of communication equipment. This white paper gives an overview of Interlaken's features and an implementation case study.
White paper
3/2007
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"Technology Abstraction Eases Silicon Intellectual Property Portability"
While the vast majority of rtl code for a design is technology independent, some functions are best described using specific cells from the target technology library. When designing a reusable IP block targeted to many different technologies, a number of challenges arise. This paper introduces SLE's methodology for dealing with technology specific cells in a way which greatly simplifies the design, synthesis, and verification effort required to retarget an IP solution to a new vendor technology.
San Jose SNUG conference paper
3/2004
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"All My X's come from Texas...Not!"
Despite many obstacles, gate level simulations continue to be an important part of the tapeout process for many ASIC design teams. This paper explores the reasons for doing gate level simulation, describes several design, library, and synthesis issues that can cause gate level simulation problems, and discusses potential solutions to these problems.
San Jose SNUG conference paper
3/2004 |
"All SPI-4's are not created equal"
Technical article details what architectural and design requirements are needed for an OIF compliant SPI-4 Phase 2 core to address the speed and interoperability requirements of today's systems.
EDN Article
02/20/03 |
"My Head Hurts, My Timing Stinks, and I Don't Love On-Chip Variation"
Technical paper describes what on-chip variation(OCV) is, its sources, and the problems it can cause. It also shows how to enable OCV analysis in PrimeTime and what the resulting timing reports look like. Slides from the presentation at SNUG'02 are available for download at the www.Deepchip.com, download #44.
Boston SNUG'02 conference paper
10/2002 |
"Hitting the 10-Gbit Mark with SPI-4.2"
Proper configuration and Usage of the SPI-4.2
CommsDesign.com Article
09/10/02 |
"Arbiters:Design Ideas and Coding Styles "
Technical paper presents several design ideas for effectively interfacing to an arbiter and investigates coding styles for some common arbitration schemes.
Boston SNUG'01 conference paper
09/2001 |
